Embedded Freaks..

November 22, 2010

Understanding NXP LPCxxxx Series Timer

Filed under: ARM9, Cortex-M, embedded-tips — Tags: , , , — kunilkuda @ 10:24 am

Not very sure about how the NXP LPCxxxx timer works ? Well, so do I =)

But after working with few of LPCxxxx series, I finally can get a good view of how the Timer works. Here’s a block diagram of how the Timer works (at least in LPC23xx, LPC24xx, LPC31xx, LPC32xx, LPC111x, LPC176x)

LPCxxxx Timer Diagram

(more…)

September 18, 2010

Running the BootROM for LPC32xx using JTAG-GDB

Filed under: ARM9, embedded-tips — Tags: — kunilkuda @ 6:06 pm

I’m using Segger J-Link with GDB server (free for personal use and evaluation) and Phytec3250. I have a program that’s needed to be run after the bootloader has been run (because the program doesn’t have all kind of initializations: SDRAM, MMU, etc).

Here’s a tip to debug the application that’s needed to be run ‘after‘ the bootloader has been loaded and run.

  1. Connect the J-Link into the JTAG port. Run the GDB server, and make sure that your ARM core is recognized. Set the JTAG speed if necessary.
  2. From command prompt, type:
     d:\> arm-none-eabi-gdb your_application.elf 
  3. Then connect your GDB with the board:
     (gdb) target remote localhost:2331

    You may need to change the port number (‘2331’ in my case) according to your GDB port no.

  4. Now, this one is LPC32xx specific, but may applicable to other ARM MCU as well.The LPC32xx has BOOT_MAP register to control which memory that is mapped in 0x00. If BOOT_MAP = 0, the LPC32xx internal ROM (contains the boot code to load the bootloader from NAND flash) will be loaded into address 0x00. If BOOT_MAP = 1, the LPC32xx internal SRAM will be loaded into address 0x00.Since we want to run the bootloader (inside the NAND flash), we want to have BOOT_MAP = 0. To check the BOOT_MAP value
     (gdb) x/1w 0x40004014
    0x40004014:     1

    To change the BOOT_MAP value:

    (gdb) set *(unsigned int*) 0x40004014=0
    

    Then we can check BOOT_MAP value again with:

    (gdb) x/1w 0x40004014
    0x40004014:     0
  5. The next step is to reset the MCU using JTAG:
    (gdb) mon reset
    Resetting target
  6. After that, you can run the bootloader with:
    (gdb) cont
    Continuing.
  7. Usually, on normal debug (debugging application without JTAG), I will wait until bootloader boots (come out with prompt, like ‘uboot>’ or ‘phy3250>’) then I run bootloader command to load my application into SDRAM. But using JTAG, once the bootloader prompt appears, I can stop the bootloader execution and load my application directly into SDRAM
    <ctrl+c pressed>
    Program received signal SIGTRAP, Trace/breakpoint trap.
    0x0000c138 in ?? ()
    (gdb)
  8. Then load my application with
    (gdb) load
    Loading section .text, size 0xc64 lma 0x80000000
    Loading section .text.dummy_delay, size 0x4 lma 0x80000c64
    Loading section .text.term_dat_recv_cb, size 0x60 lma 0x80000c68
    Loading section .text.term_dat_send_cb, size 0x74 lma 0x80000cc8
    Loading section .text.term_dat_out, size 0xac lma 0x80000d3c
    .............
    Start address 0x80000000, load size 9269
    Transfer rate: 11 KB/sec, 174 bytes/write.
    (gdb)
  9. Ok. Now I can set up the break point and start debugging my application
    (gdb) break c_entry
    Breakpoint 1 at 0x80000f40: file adc_example.c, line 346.
    (gdb) cont
    Continuing.
    
    Breakpoint 1, c_entry () at adc_example.c:346
    346         disable_irq_fiq();

September 9, 2010

Reason for Tying Unused Input Buffers to Either the Power Rail or the Ground Rail through a Resistor

Filed under: embedded-tips — Tags: — kunilkuda @ 10:08 am

A simple CMOS inverter-type input buffer has a narrow voltage range typically located a little below the Vdd/2 input voltage level at which the P-channel device and the N-channel device are turned-on to some degree simultaneously.  Current is flowing directly from the Power-supply rail to the ground rail.  This input voltage level typically occurs when the input buffer is left floating and not connected to either one of the rails.  When there are many input pins left floating the net result is that a large amount of current can be flowing from the power-supply to ground through these floating input buffers.
CMOS InverterIn NXP chips, we use a more-complex Schmitt-Trigger type input buffer in which the input trip-point is determined by the state of the output voltage level.  Because of the added feedback circuits required to achieve this functionality, there is even a greater amount of current flowing between the power-supply and ground when the input is left floating, and in addition, the central voltage-range where this occurs is much broader.

Older Posts »