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November 22, 2010

Understanding NXP LPCxxxx Series Timer

Filed under: ARM9, Cortex-M, embedded-tips — Tags: , , , — kunilkuda @ 10:24 am

Not very sure about how the NXP LPCxxxx timer works ? Well, so do I =)

But after working with few of LPCxxxx series, I finally can get a good view of how the Timer works. Here’s a block diagram of how the Timer works (at least in LPC23xx, LPC24xx, LPC31xx, LPC32xx, LPC111x, LPC176x)

LPCxxxx Timer Diagram

Note how each registers (CCR, CRx, MATx, MCR, etc) are matched to the block diagram functions.

In new LPCxxxx MCUs, the PWM (single edged PWM) is mux-ed with EMR functions. Hence, NXP added PWMC register to control which block (PWM or EMR) that controls the MATx pins.

LPCxxxx PWMC Register

So, how does the PWM block differs from EMR block ? Well, in PWM block, when TC = 0, the MATx pin will always toggled to LOW (VSS). In EMR block, it’s not.

Here’s some illustration of PWM using EMR:

LPCxxxx PWM with EMR block

Here’s illustration of PWM using PWM block:

LPCxxxx PWM with PWM block

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